Smallest Connected Multi-Parallel-Circuit Member Has No 1-Or-2-Auxiliary Realization In Large Coefficient Box¶
Claim/Theorem¶
Let M_{2,2,2} be the smallest connected member of the family from [[multiple-parallel-classes-on-one-circuit-give-connected-cut-rank-at-least-three-family.md]], and write
Fix k\in\{1,2\}. Consider quadratic pseudo-Boolean polynomials
where z=(x,h) ranges over the 7+k visible-plus-hidden bits, every quadratic coefficient satisfies
and every coefficient lies in the box
Then there is no such E with
Equivalently: exhaustive exact MILP search rules out every hidden-vertex graph-cut realization of f_{2,2,2} with 1 or 2 auxiliary bits inside this large coefficient box.
This is a derived exact bounded-budget obstruction.
- By [[smallest-connected-multi-parallel-circuit-member-survives-all-four-ary-exact-minors.md]], the target function is the
7-ary cut-rank function of the smallest connected multi-parallel-circuit member. - Any sum of binary submodular terms on the visible and hidden bits is exactly a quadratic pseudo-Boolean polynomial with all pairwise coefficients nonpositive, and minimizing over the hidden bits gives the usual hidden-vertex graph-cut expressive class.
- For fixed
k, exact existence inside the coefficient box reduces to a mixed-integer linear feasibility problem. Introduce one binary selector
for each visible assignment x and hidden assignment h, with
for each x.
4. For every pair (x,h), impose the lower-bound constraint
To force equality on the selected hidden state, use
- Because there are
monomials in a quadratic polynomial on 7+k bits, and every coefficient lies in [-64,64], every value E(x,h) lies in
Hence the linearization is exact once
is chosen.
6. For k=1, one has
The resulting exact MILP has 37 continuous coefficient variables, 256 selector binaries, and
linear constraints. HiGHS reports the model infeasible.
7. For k=2, one has
The resulting exact MILP has 46 continuous coefficient variables, 512 selector binaries, and
linear constraints. HiGHS again reports the model infeasible.
8. Therefore no hidden-vertex graph-cut realization of f_{2,2,2} exists with 1 or 2 auxiliaries inside the coefficient box [-64,64].
Consequences for the current frontier:
- the first connected
\chi\ge 3witness now resists not only the selector quotient route, the one-branch-bit local route, the exact4-ary closure route, and the directF_{\mathrm{sep}}route, but also a genuinely global exact quadratic-submodular search with1or2auxiliaries in a large coefficient box; - any successful explicit realization for
M_{2,2,2}must already use at least3hidden bits or coefficients outside this low-complexity search window; - this still falls short of whole-family nonexpressibility and still does not decide whether
M_{2,2,2}is representable with a larger auxiliary budget.
Dependencies¶
- [[smallest-connected-multi-parallel-circuit-member-survives-all-four-ary-exact-minors.md]]
- [[two-element-multi-parallel-circuit-family-satisfies-direct-fsep.md]]
- [[multiple-parallel-classes-on-one-circuit-give-connected-cut-rank-at-least-three-family.md]]
Conflicts/Gaps¶
- This node does not prove that
f_{2,2,2}is not hidden-vertex graph-cut representable. - It proves only a bounded-budget obstruction: no realization exists with
1or2auxiliaries inside the coefficient box[-64,64]. - The cases of
3or more auxiliaries remain open, and the whole size-2family remains open. - Even a future explicit realization or nonexpressibility theorem for this connected family would still need a separate bridge to routing-style
CD(T_n,G)semantics.
Sources¶
10.1016/j.dam.2009.07.00110.48550/arXiv.2109.14599