Branch-Min Route For Connected Family Fails At Local Submodularity¶
Claim/Theorem¶
Let M be a member of the connected multi-parallel-circuit family from [[multiple-parallel-classes-on-one-circuit-give-connected-cut-rank-at-least-three-family.md]], with ground set
For a cut L\subseteq E, write
Define
and
Equivalently, U(L) counts the classes P_i that are not monochromatic with the same cut value as the singleton element u.
Then the connectivity function from [[multiple-parallel-classes-on-one-circuit-give-connected-cut-rank-at-least-three-family.md]] satisfies the exact branch formula
So there is a natural candidate hidden-vertex realization route using one global branch bit h and local per-class gadgets
where p=\sum_{e\in P} x_e and m=|P|, because then formally
However, for every m\ge 2, the visible local gadget \psi_m is not submodular. Consequently, by [[minimizing-hidden-binary-submodular-energy-preserves-submodularity.md]], \psi_m is not hidden-vertex graph-cut expressible. Therefore this whole branch-min route cannot be implemented by independent per-class hidden-vertex gadgets controlled only by one global branch bit.
This is a derived obstruction statement.
- By [[multiple-parallel-classes-on-one-circuit-give-connected-cut-rank-at-least-three-family.md]],
- If
\varepsilon_L=0, let
Then U(L)=S(L)+F(L), while
Hence
- If
\varepsilon_L=1, let
Then U(L)=S(L)+E(L), while
So again
This proves the branch formula.
4. The displayed h-decomposition is just a rewriting of \min(U,1+S) into two branches: h=0 yields U, and h=1 yields 1+S.
5. Now fix any m\ge 2, and let \mathbf 1^m denote the all-ones class assignment. Consider
Then
because the h=1 branch sees a full class and the h=0 branch with u=1 also sees a class monochromatic with u.
But
so
Therefore
which violates submodularity.
6. By [[minimizing-hidden-binary-submodular-energy-preserves-submodularity.md]], every hidden-vertex binary-submodular realization has a submodular visible function. Since \psi_m is not submodular, it cannot be hidden-vertex graph-cut expressible.
7. Hence the branch formula does not directly give a connected positive theorem: the obvious implementation with one global branch bit and independent local gadgets is impossible already at the visible local-gadget level.
Consequences for the current frontier:
- the selector quotient is not the only natural route to the first connected
\chi\ge 3family, but this alternative branch-min route also fails in its obvious local-gadget form; - the failure is stronger than a bounded-auxiliary search obstruction: it is an exact visible non-submodularity obstruction for the required per-class branch gadget;
- this still does not rule out a more global hidden-vertex realization of the whole family, because a successful construction could couple the classes in a way that does not factor through independent
\psi_{m_i}blocks.
Dependencies¶
- [[multiple-parallel-classes-on-one-circuit-give-connected-cut-rank-at-least-three-family.md]]
- [[minimizing-hidden-binary-submodular-energy-preserves-submodularity.md]]
Conflicts/Gaps¶
- This node does not prove that the connected multi-parallel-circuit family itself is not hidden-vertex graph-cut representable.
- It rules out only the specific
\lambda_M=\min(U,1+S)implementation that factors through one global branch bit and independent per-class visible gadgets\psi_{m_i}. - A more global hidden-vertex realization that keeps richer cross-class structure remains open.
- Even a future whole-family positive or negative theorem would still need a separate argument to connect hidden-vertex realizability to routing-style
CD(T_n,G)semantics.
Sources¶
10.48550/arXiv.2109.1459910.1016/j.dam.2009.07.00110.1007/s10878-017-0136-yKashyap 2008 preprint: A Decomposition Theory for Binary Linear Codes