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Conjecture 3 Progress Audit - 2026-03-30 (Update 5)

Executive Verdict

Minimal-target closure remains stable. The newly added theorem [[parallel-class-affine-basis-family-is-hidden-vertex-graph-cut-representable.md]] is a genuine positive advance: it upgrades the previous single 6-qubit realization into an infinite family-level hidden-vertex representability result beyond the modular-plus-fan cone. This materially improves the map's structural understanding, but it still does not complete the full two-sided Conjecture 3 contract because the compiler-native routing/semantics bridge remains open.

Contract Checklist

  • Full two-sided Conjecture-3 inequality in the general contract remains open.
  • Minimal static-2D lower-bound target remains closed at theorem level in the map.
  • Compiler-native routing interpretation bridge remains the dominant unresolved step.
  • Threshold-consequence integration at the full contract level remains partial.

Gap Matrix

  1. Obligation: Lower-bound side lift to full compiler-native CD interpretation.
  2. Current best support: generator-invariant stabilizer cut-rank functional, SWAP-only service lower bound, and now an infinite positive hidden-vertex representability family.
  3. Missing bridge: a theorem translating family-level hidden-vertex realizations into pivot-robust routing/load semantics that match intrinsic demand across allowed compilation maps.
  4. Risk: high.

  5. Horizon: medium.

  6. Obligation: Upper-bound side in full conjecture contract.

  7. Current best support: routing/separator machinery plus restricted-model tightness results.
  8. Missing bridge: broad constructive compiler theorem achieving CD * polylog in the same formal model as the lower side.
  9. Risk: high.

  10. Horizon: medium-long.

  11. Obligation: Threshold-consequence integration.

  12. Current best support: 2D-local overhead/noise-consequence theorem stack.
  13. Missing bridge: direct derivation of the contract-level delta_eff * CD criterion from a completed two-sided theorem.
  14. Risk: medium-high.

  15. Horizon: medium-long.

  16. Obligation: Linear balanced-cut intrinsic rank for targeted parity-check spaces.

  17. Current best support: decomposition/tangle/connected-set reductions and low-order separation classification remain strong.
  18. Missing bridge: a final theorem forcing linear balanced-cut intrinsic rank under the right irreducibility assumptions.
  19. Risk: high.
  20. Horizon: medium-long.

Proof Readiness Scores

  • Minimal target proof readiness: 94-98
  • Full lower-bound side readiness: 69-80
  • Full upper-bound side readiness: 35-50
  • Full conjecture proof readiness overall: 57-67

Disproof Readiness Scores

  • Full disproof readiness: 16-30
  • Most plausible axis: show that even when hidden-vertex realizations exist for broad families, they cannot induce a routing-style compiler-native semantics with required robustness.
  • Counterexample maturity: decreased again on the hidden-vertex obstruction route, because the known arity-6 pattern now extends to an infinite family.

What Actually Changed Since Last Check

  • Node graph increased from 126 to 127 markdown nodes.
  • New theorem-level delta: [[parallel-class-affine-basis-family-is-hidden-vertex-graph-cut-representable.md]] proves an infinite threshold-lift family with explicit four-hidden-bit submodular realization, containing the previous 6-qubit witness as a special case.
  • Strategic impact:
  • This further weakens the current "find obstruction at/just above arity 6" strategy.
  • It shifts priority toward either (i) finding a qualitatively different obstruction family, or (ii) proving a broader positive theorem, then separating representability from routing semantics.

Highest-Leverage Next 3 Moves

  1. Attempt theorem-level extension beyond the threshold-lift family: characterize a maximal hidden-vertex representable subclass of stabilizer cut-rank functions (or identify a concrete first excluded family).
  2. Build the semantics bridge explicitly: give necessary/sufficient conditions under which hidden-vertex realizability implies (or fails to imply) pivot-robust compiler-native routing/load meaning for CD.
  3. Keep intrinsic closure in parallel: force linear balanced-cut intrinsic rank for target Quantum Tanner parity-check spaces, so full lower-bound closure does not depend solely on representability routes.